1. Field of the Invention
The present invention relates to a flash memory, and more particularly to a fabrication method for flash memory source line.
2. Description of the Related Art
A flash memory retains stored data without periodic electricity refresh and can be erased in blocks rather than one byte at a time. Each erasable memory block comprises a plurality of non-volatile memory cells arranged in rows and columns. Each cell is coupled to a word line, bit line and source line, with each word line coupled to a control gate of each cell in a row, each bit line coupled to a drain of each cell in a column, and the source line coupled to a source of each cell in an erasable block. The cells are programmed and erased by manipulating the voltages of the word lines, bit lines and source lines.
In FIG. 1, a conventional flash memory comprises a silicon substrate 10 and a source region S therein, with a source line 20 on the source region S. A floating gate 14 and silicon oxide layers 12 and 16 are disposed on the source line 20 sidewall, and the floating gate 14 is insulated from the source line 20 by a spacer 18. A control gate 24 is disposed on the outside of the floating gate 14, and the control gate 24 and the floating gate 14 are insulated by a silicon oxide layer 22.